1. Field of the Invention
The present invention relates to an error correction method and a radio communication apparatus for communicating over a mobile communication network with its error rate changing from time to time.
2. Description of the Related Art
Second-generation mobile communication systems characterized in digital communication are prevailing rapidly. For example, Personal Handyphone System (PHS) widely used in Japan adopts a scheme of Time Division Multiplex Access/Time Division Duplex (TDMA/TDD). This PHS scheme has a transmission capacity of 32 kbps per slot so that not only audio signals, data signals and still image signals, but also moving image signals can be transmitted. This PHS scheme is therefore much expected as the infrastructure capable of realizing mobile multimedia communication.
A conventional error correction method will be described. FIG. 4 is a block diagram showing a conventional radio communication apparatus. In FIG. 4, reference numeral 1 represents a forward error correction (FEC) operator unit, reference numeral 2 represents a multiplexer, reference numeral 3 represents a baseband processor unit, reference numeral 4 represents a radio frequency (RF) module, reference numeral 5 represents a separator, reference numeral 6 represents an FEC unit, and reference numeral 7 represents a generator polynomial table.
FIG. 5 shows a configuration of a packet used for data transfer between radio communication apparatuses such as shown in FIG. 4. In FIG. 5, reference numeral 25 represents a packet start detection flag field, reference numeral 26 represents an address field, reference numeral 27 represents a control field, reference numeral 28 represents a data field, reference numeral 29 represents an FEC addition bit field, and reference numeral 30 represents a packet end detection flag field.
Referring to FIG. 4, data to be transmitted is input to the FEC operator unit 1 and multiplexer 2. This data includes audio data, moving picture data, or the like to be loaded in the data field 28 shown in FIG. 5, and data to be loaded in the address and control fields 26 and 27 shown in FIG. 5. The address field 26 is used for the supply of discrimination information of communication partners, and the control field 27 is used for the supply of a frame type and a transmission/reception sequential order.
The FEC operator unit 1 calculates FEC addition bits by using a generator polynomial of a single type output from the generator polynomial table 7. FEC is one type of error correction method and is adopted by PHSs.
As the transmission data is input to the FEC operator unit 1, this unit 1 outputs FEC addition bits which are multiplexed with the transmission data by the multiplexer 2. This multiplexer 2 also multiplexes the data in the packet start and end detection flag fields 25 and 30 shown in FIG. 5 to configure a transmission packet shown in FIG. 5.
The baseband processor unit 3 shown in FIG. 4 performs a baseband signal communication process in accordance with protocols of a mobile communication network. Specifically, the baseband processor unit 3 loads a transmission packet supplied from the multiplexer 2 on the baseband signal, and unloads a reception packet supplied from the RF module 4 from the baseband signal. The RF module 4 modulates the baseband signal to generate radio signals, and demodulates received radio signals into the baseband signal.
The separator 5 separates a received packet into FEC addition bits and reception data before the error correction. The FTC unit 6 performs error detection and correction of the reception data in accordance with the FEC addition bits output from the separator 5, by using a generator polynomial of the single type output from the generator polynomial table 7.
Next, error correction will be described. For the error correction, binary cyclic codes (n, k) of the Bose-Chaudhuri-Hocquenghem (BCH) code system are used, where n indicates a code length and k indicates the number of information points. The code length n is the total number of bits in the address field 26, control field 27, data field 28 and FEC addition bit field 29. The number k of information points is the total number of bits in the address field 26, control field 27 and data field 28. Therefore, the number of bits in the FEC addition bit field 29 is (n-k). In this case, the generator polynomial g(x) is given by the following equation. EQU g(x)=a.sub.n-k-1 .multidot.X.sup.n-k-1 +a.sub.n-k-2 .multidot.X.sup.n-k-2 +a.sub.n-k-3 .multidot.X.sup.n-k-3 + . . . +a.sub.1 .multidot.X+a.sub.0
The above-described error correction method has, however, a limited error correction capability because it uses only one type of generator polynomial. Therefore, if errors in excess of the error correction capability are generated, these excessive errors cannot be corrected.